It’s been a while since I’ve written an update to this project, and there have been a number of developments; so it’s about time.  I now have a couple revision “B” boards deployed, also with new, more efficient firmware.  I haven’t been running the new boards or the new firmware long enough to really tell how much better they are performing, but it ought to be significant.  The big power draws are the LEDs, and they are now enabled far less frequently.  For the interested, all the new info is up on my GitHub project page.  Although, I was pretty sure I updated the ReadMe, but I’m not seeing the changes at the moment.  I’ll have to check and make sure I committed them.  But really, the important changes are:

1. I have, since rev “A”, build a new AVR ISP tool that I use to program my boards. (GitHub or OSH Park)  This makes programming the rev B board much easier, since you don’t actually solder the ISP header onto the rev B board; you just “wedge” the pins into the vias during programming.
2.  … I guess that was it.  I thought there was more than one, but I can’t remember it now.  Perhaps it was unimportant.

Next up, I have a revision “D” board coming which uses the SSOP8 package of the ATTiny45 and is smaller, even, than this board.  For those keeping score, yes, there is a “C” board–it uses a SOIC8 ATTiny, and I realized, before ordering the board, that it was the wrong footprint for the part I had ordered.  But I liked the design, so I kept it and made revision “D” instead.